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ELECTROSTATIC DISCHARGE and CORONA BREAKDOWN

The cure for this is not to sit still,

Or frost with a book by the fire,

But to take a large hoe and a shovel also,

And dig till you gently perspire”

(R. Kipling)

  1. Lin Chun-Yu, Wu Po-Han, Ker Ming-Dou: Area-Efficient and Low-Leakage Diode String for On-Chip ESD Protection. IEEE Trans on ED, Vol. 63, no. 2, 2016, pp. 531 – 536. DOI 10.1109/TED.2015.2504493

  2. Wang Weihuai, Jin Hao, Dong Shurong, et al.: Study of drain-extended NMOS under electrostatic discharge stress in 28 nm and 40 nm CMOS process. Solid-State Electronics, Vol. 116, 2016, pp. 80 – 87. DOI 10.1016/j.sse.2015.11.033

  3. Galy P., Athanasiou S., Cristoloveanu S.: BIMOS transistor solutions for ESD protection in FD-SOI UTBB CMOS technology. Solid-State Electronics, Vol. 115, Part: B, 2016, pp. 192 – 200. DOI 10.1016/j.sse.2015.09.001

  4. Li Tianqi, Pilla Viswa, Li Zhen, et al.: System-Level Modeling for Transient Electrostatic Discharge Simulation. IEEE Trans on EMC, Vol. 57, no. 6, 2015, pp. 1298 – 1308. DOI 10.1109/TEMC.2015.2443844

  5. Gossner H., Duvvury C.: System efficient ESD design. Microelectronics Reliability, Vol. 55, no. 12, Part: B, 2015, pp. 2607 – 2613. DOI 10.1016/j.microrel.2014.12.020

  6. Liang Hailian, Gu Xiaofeng, Dong Shurong, Liou Juin J.: RC-Embedded LDMOS-SCR With High Holding Current for High-Voltage I/O ESD Protection. IEEE Trans on Device and Materials Reliability, Vol. 15, no. 4, 2015, pp. 495 – 499. DOI 10.1109/TDMR.2015.2463120

  7. Lin Chun-Yu, Chang Pin-Hsin, Chang Rong-Kun: Impact of Inner Pickup on ESD Robustness of Multifinger MOSFET in 28-nm High-k/Metal Gate CMOS Process. IEEE Trans on Device and Materials Reliability, Vol. 15, no. 4, 2015, pp. 633 – 636. DOI 10.1109/TDMR.2015.2496364

  8. Zhou Yuanzhong, Miao Meng, Salcedo Javier A., et al.: Compact Thermal Failure Model for Devices Subject to Electrostatic Discharge Stresses. IEEE Trans on ED, Vol. 62, no. 12, 2015, pp. 4128 – 4134. DOI 10.1109/TED.2015.2491223

  9. Wu Cheng-Hsu, Lee Jian-Hsing, Lien Chenhsin: A Novel Drain Design for ESD Improvement of UHV-LDMOS. IEEE Trans on ED, Vol. 62, no. 12, 2015, pp. 4135 – 4138. DOI 10.1109/TED.2015.2493879

  10. Liu Hao, Liu Shanghe, Cao Hefei, et al.: Study of ESD induced by spark EMP radiation at low air pressure. Vacuum, Vol. 122, Part: A, 2015, pp. 31 – 35. DOI 10.1016/j.vacuum.2015.09.004

  11. Zhang Chunwei, Liu Siyang, Sun Weifeng, Shi Longxing: A novel area-efficiency multi-finger GGnMOS with high ESD robustness. Solid-State Electronics, Vol. 114, 2015, pp. 131 – 134. DOI 10.1016/j.sse.2015.09.011

  12. Yan Yongming, Wang Yang, Zeng Yun, Jin Xiangliang: Layout geometry impact on nLDMOS devices for high-voltage ESD protection. Electronics Lett., Vol. 51, no. 23, 2015, pp. 1902 – 1903. DOI 10.1049/el.2015.2156

  13. Caignet F., Nolhier N., Bafleur M., et al.: 20 GHz on-chip measurement of ESD waveform for system level analysis. Microelectronics Reliability, Vol. 55, no. 11, 2015, pp. 2276 – 2283. DOI 10.1016/j.microrel.2014.12.021

  14. Lim T., Benech P., Jimenez J., et al.: Generic Electrostatic Discharges Protection Solutions for RF and Millimeter-Wave Applications. IEEE Trans on MTT, Vol. 63, no. 11, 2015, pp. 3747 – 3759. DOI 10.1109/TMTT.2015.2478000

  15. Young J. A., Crofton M.W., Ferguson D.C., et al.: Preliminary Measurements of ESD Propagation on a Round Robin Coupon. IEEE Trans on Plasma Science, Vol. 43, no. 11, 2015, pp. 3939 – 3947. DOI 10.1109/TPS.2015.2479188

  16. Gerhard A., Steins W., Siguier J.M., et al.: Analysis of Solar Array Performance Degradation During Simulated Flashover Discharge Experiments on a Full Panel and Using a Simulator Circuit. IEEE Trans on Plasma Science, Vol. 43, no. 11, 2015, pp. 3933 – 3938. DOI 10.1109/TPS.2015.2454233

  17. Cho Han-Hee, Koo Yong-Seo: A Design of Wide-Bandwidth LDO Regulator with High Robustness ESD Protection Circuit. Journal of Power Electronics, Vol. 15, no. 6, 2015, pp. 1673 – 1681. DOI 10.6113/JPE.2015.15.6.1673

  18. Wang Yang, Jin Xiangliang, Yang Liu: Robust lateral double-diffused MOS with interleaved bulk and source for high-voltage electrostatic discharge protection. IET Power Electronics, Vol. 8, no. 11, 2015, pp. 2251 – 2256. DOI 10.1049/iet-pel.2014.0763

  19. Lee Kwanjae, Lee Cheul-Ro, Kim Jin Soo, et al.: Electrostatic Discharge Characteristics of InGaN/GaN Light-Emitting Diodes with Si-Doped Graded Superlattice. J. of Nanoscience and Nanotechnology, Vol. 15, no. 10, Special no. SI, 2015, pp. 7733 – 7737. DOI 10.1166/jnn.2015.11189

  20. Zhang Li-Zhong, Wang Yuan, Lu Guang-Yi, et al.: A novel diode string triggered gated-PiN junction device for electrostatic discharge protection in 65-nm CMOS technology. Chinese Physics B, Vol. 24, no. 10, 2015, Article # 108503. DOI 10.1088/1674-1056/24/10/108503

  21. Zhang Shuai, Dong Shu-Rong, Wu Xiao-Jing, et al.: An improved GGNMOS triggered SCR for high holding voltage ESD protection applications. Chinese Physics B, Vol. 24, no. 10, 2015, Article # 108502. DOI 10.1088/1674-1056/24/10/108502

  22. Ma Chao, Zhao Gao, Wang Yu, et al.: The Evolution of Discharge Mode Transition in Helicon Plasma Through ICCD Images. IEEE Trans on Plasma Science, Vol. 43, no. 10, Part: 2, 2015, pp. 3702 – 3706. DOI 10.1109/TPS.2015.2474405

  23. Young J.A., Crofton M.W.: ESD Propagation Dynamics on a Radially Symmetric Coupon. IEEE Trans on Plasma Science, Vol. 43, no. 10, Part: 2, 2015, pp. 3749 – 3759. DOI 10.1109/TPS.2015.2475719

  24. Saenko V.S., Tyutnev A.P., Nikolski E.V., Bakutov A.E.: Protection of the Spectr-R Spacecraft Against ESD Effects Using Satellite-MIEM Computer Code. IEEE Trans on Plasma Science, Vol. 43, no. 9, Special no. SI, Part: 1, 2015, pp. 2828 – 2831. DOI 10.1109/TPS.2015.2389333

  25. Andersen A., Dennison J.R., Sim A.M., et al.: Measurements of Endurance Time for Electrostatic Discharge of Spacecraft Materials: A Defect-Driven Dynamic Model. IEEE Trans on Plasma Science, Vol. 43, no. 9, Special no. SI, Part: 1, 2015, pp. 2941 – 2953. DOI 10.1109/TPS.2015.2428258

  26. Siguier J.-M., Inguimbert V., Murat G., Payan D., Balcon N.: Arcing Test on an Aged Grouted Solar Cell Coupon With a Realistic Flashover Simulator. IEEE Trans on Plasma Science, Vol. 43, no. 9, Special no. SI, Part: 1, 2015, pp. 2975 – 2979. DOI 10.1109/TPS.2015.2417057

  27. Siguier J.-M., Inguimbert V., Murat G., Payan D., Balcon N.: Study on Secondary Arcing Occurrence on Solar Panel Backside Wires With Cracks. IEEE Trans on Plasma Science, Vol. 43, no. 9, Special no. SI, Part 1, 2015, pp. 2980 – 2984. DOI 10.1109/TPS.2015.2441955

  28. Inguimbert V., Siguier J.-M., Murat G., et al.: Measurements of Physical Parameters Characterizing ESDs on Solar Cell and Correlation Between Spectral Signature and Discharge Position. IEEE Trans on Plasma Science, Vol. 43, no. 9, Special no. SI, Part 1, 2015, pp. 2985 – 2992. DOI 10.1109/TPS.2015.2459601

  29. Wright K.H. Jr., Schneider T.A., Vaughn J.A., Hoang Bao, Wong Frankie K.: High-Current ESD Test of Advanced Triple Junction Solar Array Coupon. IEEE Trans on Plasma Science, Vol. 43, no. 9, Special no. SI, Part 1, 2015, pp. 2993 – 2999. DOI 10.1109/TPS.2015.2440185

  30. Joshi Rashmi S., Gupta Suryakant B.: Diagnostic of Neutralization Current for Arcs on Satellite Solar Panel Coupons. IEEE Trans on Plasma Science, Vol. 43, no. 9, Special no. SI, Part 1, 2015, pp. 3000 – 3005. DOI 10.1109/TPS.2015.2456212

  31. Hoffmann R., Ferguson D., Patton J., et al.: AFRL Round-Robin Test Results on Plasma Propagation Velocity. IEEE Trans on Plasma Science, Vol. 43, no. 9, Special no. SI, Part 1, 2015, pp. 3006 – 3013. DOI 10.1109/TPS.2015.2465865

  32. Boselli G.: Foreword for the Special Issue on Active MOSFET Klamps for ESD Protection of Advanced CMOS Technologies. IEEE Trans on Device and Materials Reliability, Vol. 15, no. 3, 2015, pp. 262 – 262. DOI 10.1109/TDMR.2015.2468371

  33. Mertens R., Thomson N., Xiu Yang, et al.: Analysis of Active-Klamp Response to Power-On ESD: Power Supply Integrity and Performance Tradeoffs. IEEE Trans on Device and Materials Reliability, Vol. 15, no. 3, 2015, pp. 263 – 271. DOI 10.1109/TDMR.2015.2464222

  34. Stockinger M., Secareanu R.: Unexpected Latch-Up Through CMOS Triple-Well Structures. IEEE Trans on Device and Materials Reliability, Vol. 15, no. 3, 2015, pp. 272 – 279. DOI 10.1109/TDMR.2015.2466532

  35. Di Biccari L., Cerati L., Pozzobon F., et al.: Thin-Copper-Metal Interconnection Thermomigration Analysis in ESD Regime. IEEE Trans on Device and Materials Reliability, Vol. 15, no. 3, 2015, pp. 280 – 288. DOI 10.1109/TDMR.2015.2463071

  36. Meng Kuo-Hsuan, Mertens R., Rosenbaum E.: Piecewise-Linear Model With Transient Relaxation for Circuit-Level ESD Simulation. IEEE Trans on Device and Materials Reliability, Vol. 15, no. 3, 2015, pp. 464 – 466. DOI 10.1109/TDMR.2015.2466436

  37. Rossetto I., Meneghini M., Barbato M., et al.: Demonstration of Field- and Power-Dependent ESD Failure in AlGaN/GaN RF HEMTs. IEEE Trans on ED, Vol. 62, no. 9, 2015, pp. 2830 – 2836. DOI 10.1109/TED.2015.2463713

  38. Anand Amirtha, Rani Neelima, Saxena Padma, Bhandari Hema, Dhawan Sundeep Kumar: Development of polyaniline/zinc oxide nanocomposite impregnated fabric as an electrostatic charge dissipative material. Polymer International, Vol. 64, no. 9, 2015, pp. 1096 – 1103. DOI 10.1002/pi.4870

  39. Rigato M., Fleury C., Heer M., et al.: ESD characterization of multi-finger RF nMOSFET transistors by TLP and transient interferometric mapping technique. Microelectronics Reliability, Vol. 55, no. 9-10, 2015, pp. 1471 – 1475. DOI 10.1016/j.microrel.2015.06.019

  40. Arbess H., Bafleur M., Tremouffles D., Zerarka M.: Optimization of a MOS-IGBT-SCR ESD protection component in smart power SOI technology. Microelectronics Reliability, Vol. 55, no. 9-10, 2015, pp. 1476 – 1480. DOI 10.1016/j.microrel.2015.06.138

  41. Galy P., Schoenmaker Wim: Coupled electro-magnetic field & Lorentz force effects in silicon and metal for ESD investigation in transient and harmonic regimes. Microelectronics Reliability, Vol. 55, no. 9-10, 2015, pp. 1532 – 1536. DOI 10.1016/j.microrel.2015.06.091

  42. Kachi M., Dascalescu L.: Corona-discharge-based neutralization of charged granular insulating materials in contact with an electrode of opposite polarity. J. of Electrostatics, Vol. 76, 2015, pp. 246 – 253. DOI 10.1016/j.elstat.2015.06.006

  43. Tomita Hajime: Effect of Charged Sphere Size on Electrostatic Discharge Generated While Approaching a Stationary Object. Electrical Eng. in Japan, Vol. 192, no. 3, 2015, pp. 1 – 10. DOI 10.1002/eej.22674

  44. Honda Masamitsu, Isofuku Satoshi: Characteristics of Small Gap Discharge Events and Their EMI Effects. IEICE Trans on Communications, Vol. E98B, no. 7, 2015, pp. 1220 – 1226. DOI 10.1587/transcom.E98.B.1220

  45. Ge Changfeng, Cosgrove K.: Preparation of PVOH coatings with graphene nanoplatelets for electrostatic discharge protective packaging. J. of Electrostatics, Vol. 77, 2015, pp. 157 – 162. DOI 10.1016/j.elstat.2015.08.008

  46. Tamminen P., Viheriakoski T., Sydanheimo L., Ukkonen L.: ESD qualification data used as the basis for building electrostatic discharge protected areas. J. of Electrostatics, Vol. 77, 2015, pp. 174 – 181. DOI 10.1016/j.elstat.2015.08.009

  47. Katsivelis P.S., Gonos I.F., Stathopulos I.A.: Human-to-metal electrostatic discharge current measurements - Notes on the ESD current waveform. J. of Electrostatics, Vol. 77, 2015, pp. 182 – 190. DOI 10.1016/j.elstat.2015.08.006

  48. Gupta Ankur, Shrivastava Mayank, Baghini Maryam Shojaei, et al.: Part II: A Fully Integrated RF PA in 28-nm CMOS With Device Design for Optimized Performance and ESD Robustness. IEEE Trans on ED, Vol. 62, no. 10, 2015, pp. 3176 – 3183. DOI 10.1109/TED.2015.2470109

  49. Li Panpan, Li Hongjian, Zhao Yongbing, et al.: Excellent ESD Resistance Property of InGaN LEDs With Enhanced Internal Capacitance. IEEE Photonics Technology Lett., Vol. 27, no. 19, 2015, pp. 2004 – 2006. DOI 10.1109/LPT.2015.2448418

  50. Guangyao Shen, Sen Yang, Khilkevich V.V., Pommerenke D.J., Aichele H.L., Eichel D.R., Keller C.: ESD Immunity Prediction of D Flip-Flop in the ISO 10605 Standard Using a Behavioral Modeling Methodology. IEEE Trans on EMC, Vol. 57, no. 4, 2015, pp. 651-659. DOI 10.1109/TEMC.2015.2418715

  51. Junsik Park, Jongsung Lee, Byongsu Seol, Jingook Kim: Efficient Calculation of Inductive and Capacitive Coupling Due to Electrostatic Discharge (ESD) Using PEEC Method. IEEE Trans on EMC, Vol. 57, no. 4, 2015, pp. 743 – 753. DOI 10.1109/TEMC.2015.2424259

  52. Kai Yu, Sizhen Li, Zhihao Zhang, Zhang, G., Qiaoling Tong, Xuecheng Zou: Enhanced ESD power klamp for antenna switch controller with SOI CMOS technology. Electronics Lett., Vol. 51, no. 11, 2015, pp. 871 – 872. DOI 10.1049/el.2014.4160

  53. Chun-Yu Lin, Rong-Kun Chang: Design of ESD Protection Device for K/Ka-Band Applications in Nanoscale CMOS Process. IEEE Trans on ED, Vol. 62, no. 9, 2015, pp. 2824 – 2829. DOI 10.1109/TED.2015.2450225

  54. Chun-Yu Lin, Pin-Hsin Chang, Rong-Kun Chang: Improving ESD Robustness of pMOS Device With Embedded SCR in 28-nm High-k /Metal Gate CMOS Process. IEEE Trans on ED, Vol. 62, no. 4, 2015, pp. 1349 – 1352. DOI 10.1109/TED.2015.2396946

  55. Jie Zeng, Shurong Dong, Liou J.J., Yan Han, Lei Zhong, Weihuai Wang: Design and Analysis of an Area-Efficient High Holding Voltage ESD Protection Device. IEEE Trans on ED, Vol. 62, no. 2, 2015, pp. 606 – 614. DOI 10.1109/TED.2014.2381511

  56. Xiaowu Cai, Beiping Yan, Xiao Huo: An Area-Efficient Klamp Based on Transmission Gate Feedback Technology for Power Rail Electrostatic Discharge Protection. IEEE ED Lett., Vol. 36, no. 7, 2015, pp. 639 – 641. DOI 10.1109/LED.2015.2434835

  57. Ruei-Cheng Sun, Zhixin Wang, Klebanov M., Wei Liang, Liou J.J., Don-Gey Liu: Silicon-Controlled Rectifier for Electrostatic Discharge Protection Solutions With Minimal Snapback and Reduced Overshoot Voltage. IEEE ED Lett., Vol. 36, no. 5, 2015, pp. 424 – 426. DOI 10.1109/LED.2015.2413844

  58. Kuznetsov V., Kechiev L.: Charged Board Model ESD Simulation for PCB Mounted MOS Transistors. IEEE Trans on EMC, Vol. 57, no. 5, 2015, pp. 947 – 954. DOI 10.1109/TEMC.2015.2423703

  59. Chua-Chin Wang, Chih-Lin Chen, Zong-You Hou, Yi Hu, Jam-Wem Lee, Wan-Yen Lin, Yi-Feng Chang, Chia-Wei Hsu, Ming-Hsiang Song: A 60 V Tolerance Transceiver With ESD Protection for FlexRay-Based Communication Systems. IEEE Trans on CAS I : Regular Papers, Vol. 62, no. 3, 2015, pp. 752 – 760. DOI 10.1109/TCSI.2014.2370192

  60. Wang Z., Klebanov M., Cooper R.B., Liang W., Courtney S., Liou J.J.: No-Snapback Silicon-Controlled Rectifier for Electrostatic Discharge Protection of High-Voltage ICs. IEEE ED Lett., Vol. 36, no. 11, 2015, pp. 1121 – 1123. DOI 10.1109/LED.2015.2479612

  61. Altolaguirre F.A., Ming-Dou Ker: Area-Efficient ESD Klamp Circuit With a Capacitance-Boosting Technique to Minimize Standby Leakage Current. IEEE Trans on Device and Materials Reliability, Vol. 15, no. 2, 2015, pp. 156 – 162. DOI 10.1109/TDMR.2015.2407572

  62. Xingming Bian, Yuanjiu Wang, Liming Wang, Zhicheng Guan, Shuwei Wan, Lan Chen, Fangdong Chen, Xuesong Zhao: The effect of surface roughness on corona-generated electromagnetic interference for long-term operating conductors. IEEE Trans on Dielectrics and Electrical Insulation, Vol. 22, no. 2, 2015, pp. 879 – 887. DOI 10.1109/TDEI.2015.7076788

  63. Souza A.L., Lopes I.J.S.: Experimental investigation of corona onset in contaminated polymer surfaces. IEEE Trans on Dielectrics and Electrical Insulation, Vol. 22, no. 2, 2015, pp. 1321 – 1331. DOI 10.1109/TDEI.2015.7076837

  64. Shen-Li Chen, Yi-Sheng Lai: Strengthen Anti-ESD Characteristics in an HV LDMOS With Superjunction Structures. IEEE Trans on Power Electronics, Vol. 30, no. 5, 2015, pp. 2375 – 2382. DOI 10.1109/TPEL.2014.2336832

  65. Riu Gao, Zhigang Ji, Zhang J.F., Wei Dong Zhang, Wan Muhamad Hatta S.F., Niblock J., Bachmayr P., Stauffer L., Wright K., Greer S.: A Discharge-Based Pulse Technique for Probing the Energy Distribution of Positive Charges in Gate Dielectric. IEEE Trans on Semiconductor Manufacturing, Vol. 28, no. 3, 2015, pp. 221 – 226. DOI 10.1109/TSM.2015.2407909

  66. Liang Lin, Wen-Yan Yin, Liang Zhou: Study on ESD Effects of GaAs HBT Power Amplifiers for DCS/GSM Dual Band Handsets. IEEE Trans on EMC, Vol. 56, no. 5, 2014, pp. 1013 – 1019. DOI 10.1109/TEMC.2014.2305156

  67. Minoh Son, Changkun Park: Electrostatic discharge protection devices with series connection using distributed cell-based diodes. Electronics Lett., Vol. 50, no. 3, 2014, pp. 168 – 170. DOI 10.1049/el.2013.3753

  68. Hong Li, Russ C.C., Wei Liu, Johnsson D., Gossner H., Banerjee K.: On the Electrostatic Discharge Robustness of Graphene. IEEE Trans on ED, Vol. 61, no. 6, 2014, pp. 1920 – 1928. DOI 10.1109/TED.2014.2315235

  69. Chung-Yu Hung, Tzu-Cheng Kao, Jian-Hsing Lee, Jeng Gong, Kuo-Hsuan Lo, Hung-Der Su, Chih-Fang Haung: Improving the Electrostatic Discharge Robustness of a Junction Barrier Schottky Diode Using an Embedded p-n-p BJT. IEEE ED Lett., Vol. 35, no. 10, 2014, pp. 1052 – 1054. DOI 10.1109/LED.2014.2350020

  70. Sirui Luo, Salcedo J.A., Hajjar J.-J., Yuanzhong Zhou, Liou J.J.: ESD Protection Device With Dual-Polarity Conduction and High Blocking Voltage Realized in CMOS Process. IEEE ED Lett., Vol. 35, no. 4, 2014, pp. 437 – 439. DOI 10.1109/LED.2014.2305634

  71. Chen Zhang, Zongyu Dong, Fei Lu, Rui Ma, Li Wang, Hui Zhao, Xin Wang, Xiao Wang, He Tang, Wang A.: Fuse-Based Field-Dispensable ESD Protection for Ultra-High-Speed ICs. IEEE ED Lett., Vol. 35, no. 3, 2014, pp. 381 – 383. DOI 10.1109/LED.2014.2300496

  72. Sirui Luo, Salcedo J.A., Parthasarathy S., Yuanzhong Zhou, Hajjar J.-J., Liou J.J.: In Situ ESD Protection Structure for Variable Operating Voltage Interface Applications in 28-nm CMOS Process. IEEE Trans on Device and Materials Reliability, Vol. 14, no. 4, 2014, pp. 1061 – 1067. DOI 10.1109/TDMR.2014.2364719

  73. Chun-Yu Lin, Mei-Lian Fan: Optimization on Layout Style of Diode Stackup for On-Chip ESD Protection. IEEE Trans on Device and Materials Reliability, Vol. 14, no. 2, 2014, pp. 775 – 777. DOI 10.1109/TDMR.2014.2311130

  74. Shih-Hung Chen, Linten D., Scholz M., Yu-Ching Huang, Hellings G., Boschke R., Ming-Dou Ker, Groeseneken G.: Local CDM ESD Protection Circuits for Cross-Power Domains in 3D IC Applications. IEEE Trans on Device and Materials Reliability, Vol. 14, no. 2, 2014, pp. 781 – 783. DOI 10.1109/TDMR.2014.2320538

  75. Scholz M., Shih-Hung Chen, Thijs S., Linten D., Hellings G., Vandersteen G., Sawada M., Groeseneken G.: System-Level ESD Protection Design Using On-Wafer Characterization and Transient Simulations. IEEE Trans on Device and Materials Reliability, Vol. 14, no. 1, 2014, pp. 104 – 111. DOI 10.1109/TDMR.2012.2201720

  76. Kuhn W.B., Eatinger R.J., Melton S.A.: ESD Detection Circuit and Associated Metal Fuse Investigations in CMOS Processes. IEEE Trans on Device and Materials Reliability, Vol. 14, no. 1, 2014, pp. 146 – 153. DOI 10.1109/TDMR.2013.2296750

  77. Xi Y., Malobabic S., Vashchenko V., Liou J.: Correlation Between TLP, HMM, and System-Level ESD Pulses for Cu Metallization. IEEE Trans on Device and Materials Reliability, Vol. 14, no. 1, 2014, pp. 446 – 450. DOI 10.1109/TDMR.2013.2292039

  78. Abouelsaad M.M.: Modelling of corona discharge of a tri-electrode system for electrostatic separation processes. IET Science, Measurement & Technology, Vol. 8, no. 6, 2014, pp. 497 – 504. DOI 10.1049/iet-smt.2013.0205

  79. Chun-Yu Lin, Mei-Lian Fan: Design of ESD Protection Diodes With Embedded SCR for Differential LNA in a 65-nm CMOS Process. IEEE Trans on MTT, Vol. 62, no. 11, 2014, pp. 2723 – 2732. DOI 10.1109/TMTT.2014.2356975

  80. Ming-Dou Ker, Chih-Ting Yeh: On the Design of Power-Rail ESD Klamp Circuits With Gate Leakage Consideration in Nanoscale CMOS Technology. IEEE Trans on Device and Materials Reliability, Vol. 14, no. 1, 2014, pp. 536 – 544. DOI 10.1109/TDMR.2013.2280044

  81. Shrivastava M., Kulshrestha N., Gossner H.: ESD Investigations of Multiwalled Carbon Nanotubes. IEEE Trans on Device and Materials Reliability, Vol. 14, no. 1, 2014, pp. 555 – 563. DOI 10.1109/TDMR.2013.2288362

  82. Beekmann Knut: Eliminating electrostatic discharge: Protecting tomorrow's technology. Solid State Technology, Vol. 58, no. 7, 2014, pp. 33 – 36.

  83. Tsai Hui-Wen, Ker Ming-Dou: Active Guard Ring to Improve Latch-Up Immunity. IEEE Trans on ED, Vol. 61, no. 12, 2014, pp. 4145 – 4152. DOI 10.1109/TED.2014.2363171

  84. Atar Nurit, Grossman Eitan, Gouzman Irina, et al.: Reinforced Carbon Nanotubes as Electrically Conducting and Flexible Films for Space Applications. ACS Applied Materials & Interfaces, Vol. 6, no. 22, 2014, pp. 20400 – 20407. DOI 10.1021/am505811g

  85. F. Wan, D. Pommerenke, H. Shumiya, K. Araki: Time lag of secondary ESD in millimeter size spark gaps. IEEE Trans on EMC, Vol. 56, no. 1, 2014, pp. 28 – 34. DOI 10.1109/TEMC.2013.2275922

  86. Arbess H., Bafleur M., Tremouilles D., Zerarka M.: Combined MOS-IGBT-SCR structure for a compact high-robustness ESD power klamp in smart power SOI technology. IEEE Trans on Device and Materials Reliability, Vol. 14, no. 1, 2014, pp. 432 – 440.  DOI 10.1109/TDMR.2013.2281726

  87. Kuo-Hsuan Meng, Rosenbaum E.: Verification of Snapback Model by Transient I-V Measurement for Circuit Simulation of ESD Response. IEEE Trans on Device and Materials Reliability, Vol. 13, no. 2, 2013, pp. 371 – 378. DOI 10.1109/TDMR.2013.2258672

  88. Yiqun Cao, Glaser U.: Novel Active ESD Klamps for High-Voltage Applications. IEEE Trans on Device and Materials Reliability, Vol. 13, no. 2, 2013, pp. 388 – 397. DOI 10.1109/TDMR.2013.2256910

  89. Chu Li-Wei, Lin Chun-Yu, Ker Ming-Dou: Design of Dual-Band ESD Protection for 24-/60-GHz Millimeter-Wave Circuits. IEEE Trans on Device and Materials Reliability, Vol. 13, no. 1, 2013, pp. 110118. DOI 10.1109/TDMR.2012.2217498

  90. Chih-Ting Yeh, Ming-Dou Ker: High Area-Efficient ESD Klamp Circuit With Equivalent RC-Based Detection Mechanism in a 65-nm CMOS Process. IEEE Trans on ED, Vol. 60, no. 3, 2013, pp. 1011 – 1018. DOI 10.1109/TED.2013.2241441

  91. Wang X., Shi Z., Liu J., Lin L., Zhao H., Wang L., Ma R., Zhang C., Dong Z., Fan S., Tang H., Wang A., Cheng Y., Zhao B., Zhang Z., Chi B., Ren T.-L.: Post-Si Programmable ESD Protection Circuit Design: Mechanisms and Analysis. IEEE Journal of SSC, Vol. 48, no. 5, 2013, pp. 1237 – 1249. DOI 10.1109/JSSC.2013.2255192

  92. Monnereau N., Caignet F., Tremouilles D., Nolhier N., Bafleur M.: A System-Level Electrostatic-Discharge-Protection Modeling Methodology for Time-Domain Analysis. IEEE Trans on EMC, Vol. 55, no. 1, 2013, pp. 45 – 57. DOI 10.1109/TEMC.2012.2208973

  93. F. Wan, J.-X. Ge, D. Pommerenke: Absolute humidity, relative humidity which one is more important in representing the severity of electrostatic discharge. Electronics Lett., Vol. 49, no. 23, 2013, pp.1451 – 1452. DOI 10.1049/el.2013.1766

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Links:

IEC 61000-4-2 http://webstore.iec.ch/preview/info_iec61000-2-10%7Bed1.0%7Db.pdf
 

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